A little more information

[Tom Droege <tdroege@veriomail.com>]

I keep reminding myself that this whole project was designed to keep me 
excited and stimulated during retirement.  I did not plan on frustrated.  ;^)

OK, it is worth considering a little background on the problem.

When I started all this many long years ago, I had had a lot of experience 
building electronic systems and not being able to get software help.   This 
is mainly because administrators in high energy physics do not understand 
how work is really done, so they to not put together the right sort of 
team.  When I started, I did not expect to be able to get software 
help.  So I designed a scheme that I could do entirely by myself.  This 
with the exception of the analysis software.  I counted on getting 
that.  But not day to day help to get things fixed and working.  Thus I 
designed the system with a memory card that could be unloaded using QBasic 
routines that I knew I could make work.

I now find that with this group I can get such help.  Further, the project 
is now far enough along that it can be run in parallel with new hardware 
being brought on line as it can replace the old.  So my starting premise is 
no longer valid.  Further, it appears that the parallel port is now fast 
enough to do this project.

I spent yesterday working my way through the stack of Memory boards.  Of 12 
I tested, only 3 would work in the system.  I suspect there is some sort of 
race in the design.  The design was done by someone else, and I don't 
understand it.  It was further changed mid design, so the drawings include 
things that are not used and it is more complicated than it really needs to 
be.  OK if I spend a few days writing test code, and a few more studying 
the drawings, I may be able to figure out how it works.  I may also be able 
to design a fix so that all the boards can be made to work.  It also may 
not be possible.  All the symptoms point to something marginal.  The system 
drops or picks bytes.  The result is that the high byte and the low byte 
are interchanged.  You all my remember this as a very old problem.  I used 
to think it was a cable problem, but I have looked hard at everything and I 
really think it is in the memory board itself.

Seems to me that everything would be better if we instead put effort into 
plugging the output of the Mark IV into some standard parallel port.  I 
think the IEEE 1284 is fast enough, even over 100' of (good) cable.  I used 
100' of shielded twisted pair for the NOFS installation, and it transmits 
the signals at acceptable quality, though I would not like to go 
200'.  Those who know about cable will understand.

The reason I did not want to try this before is that it requires system 
level code.  I think we should consider it now.

Tom Droege