Re: The Memory Board Fix

["Robert Creager" <Robert_Creager@LogicalChaos.org>]

Presumably, I will have too much time on my hands this weekend, so I'll update 
downfits to reset the memory board address register.

Cheers,
Rob

Date sent:      	Thu, 23 May 2002 15:45:54 -0500
To:             	tass@listserv.wwa.com
From:           	Tom Droege <tdroege2@earthlink.net>
Subject:        	The Memory Board Fix

> Michael, please make the following a service note.
> 
> Those of you with camera systems should read this and take appropriate
> action with your code.
> 
> Tom Droege
> 
> ----------------------------------------------------------------------
> --------- The Memory Board Problem and the Fix.
> 
> The problem with the Memory Board that caused it to sometimes read
> junk, was found to be due to an incorrect reset sequence.  As a
> result, the memory board read register could be reset to something
> other than zero.  Often one off.  This caused a low byte - high byte
> switch of the next word problem.  This happened depending on whether
> the CMD REG, CABLE RST REG, and the CABLE ACTIVE REG happened to end
> up in the right state on turn on.
> 
> Their was confusion on how to program the board since Merle engaged in
> some creative digital logic design which does not show up on the
> drawing.  So when I wrote the code, I did not understand Merle's
> comments on how to properly code it.  If you look at drawing "Cable
> Stuff" you will find a 244 in the middle of the page.  What is not
> shown is that the upper bank of four drivers is enabled by the Q
> output of the CMD REG being low.  The lower bank of four drivers is
> enables by the -Q output of CMD REG being low.  Thus if the CMD REG is
> not in the right state, the reset signals sent by out &h300 I/O
> commands do not make it to do their job.
> 
> The correct sequence to reset the Memory board address register is
> thus:
> 
> OUT &H300, &H80   'set the CMD REG so that OUTs will send pulses
> through the lower path OUT &H300, &H05   'reset the mar and the CABLE
> RST REG OUT &H300, &H00   'set the CMD REG so that signals from the
> cable make it to the logic P% = 7                        'set up to
> send a reset MAR through the path down the cable Call Pulset (       )
>       'call the QBasic routine that sends the reset MAR signal down
> the cable by
>                                    'sending the appropriate code to
>                                    the stamp
> 
> With this scheme, the Memory MAR is reset twice.  A good thing to do,
> I think since we have not been reseting it often enough for several
> years.  I thing the reset through the Stamp could be left out if one
> wants to speed up the reset slightly.
> 
> Note that the Memory should be reset as above before starting a CCD
> read out sequence.  It should also be reset as above before reading
> out the Memory card to disk.
> 
> 
>